Physical Design Engineer

2 weeks ago


Bengaluru, India Sintegra Inc. Full time

Job SummaryWe are seeking a highly experienced Senior Physical Design Engineer with a minimum of 10 years in the RTL to GDSII flow. This role requires hands-on expertise with Cadence Innovus , experience at N3 and below process nodes , and strong scripting and flow debugging skills .Key ResponsibilitiesLead physical design activities from RTL to GDSII, ensuring high-quality and timely project deliveryExecute floorplanning, placement, CTS, routing, and physical verificationDevelop and maintain automation scripts to streamline physical design tasksCollaborate with RTL, DFT, and verification teams to resolve design issues and achieve timing closureOptimize for power, performance, and area (PPA) to meet design targetsAnalyze timing, signal integrity, and power reports; implement necessary design changesMentor junior engineers and promote continuous learning and improvementStay current with physical design methodologies and integrate best practicesRequired QualificationsBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field10+ years of experience in physical design with deep understanding of RTL to GDSII flowProven hands-on experience with Cadence InnovusDemonstrated expertise in N3 and below technology nodesStrong scripting skills in Tcl, Perl, or Python , with ability to debug and enhance design flowsSuccessful track record in timing closure, PPA optimization, and resolving complex design challengesSolid grasp of digital design principles including clock distribution, signal integrity, and power analysisExcellent problem-solving and communication skillsPreferred SkillsKnowledge of low-power design techniquesFamiliarity with version control systems and collaborative development toolsExperience with physical verification tools such as Calibre or Mentor Graphic



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