Senior DV Engineers

2 weeks ago


bangalore, India L&T Technology Services Full time

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned. 8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification 8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologies Experience in development of UVM based verification environments from scratch Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle Experience with verification of ARM/RISC-V based CPU sub-stems or SoCs Experience with IP or integration verification along with expertise of protocols like AMBA, PCIe, DDR, USB, Ethernet Experience in E tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Experience with revision control stems like Mercurial(Hg), Git or SVN


  • Senior DV Engineer

    1 week ago


    bangalore, India L&T Technology Services Full time

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  • bangalore, India L&T Technology Services Full time

    L&T Technology is looking to hire for Design Verification Engineers. Job Location : Bangalore Detailed JD is below ::Job Description DV Positions: Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verification Develop functional tests based on verification test plan Drive Design Verification to...


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  • bangalore, India HCLTech Full time

    Hello VLSI folks! HCL Engineering - Semiconductor - Hiring Design Verification Engineer (Senior Level - 5 to 20Years years’ experience) - Chennai, Bangalore. Interested aspirants could email your profile to /Call .We will discuss in details on the job profile & responsibilities. Company: HCL Tech Job Summary: We are seeking a highly accomplished Design...

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