Standard cell characterization

5 days ago


Bangalore, India ACL Digital Full time

Job Description: Exp: 2 to 8 Years Location: Bangalore Role and Responsibilities: • Experience with at least one characterization tool (Silicon Smart/Liberate) for complete characterization of a library to generate the front end and back end views. • Understanding of CCS, ECSM liberty models, LVF, Verilog models, statistical characterization. • Understanding of characterization methodologies for combinational, sequential cells and timing, power, capacitance models. • Knowledge of cell characterization flows and methodologies, library verification and validation. • Familiarity with circuit simulators, liberty syntax, library compiler, design compiler.· • Basic understanding of static timing analysis and synthesis. • Scripting skills with python,shell,tcl. Skill Requirements:· Characterization and generation of front end and back end views for standard cell libraries· Custom cell characterization setup and flows· Library verification and validation· Automation for the QA checks, for small tasks in setting up the flows for characterization and QA· Documentation of and recording the issues, debugs, solutions and new/enhanced work flows· Mentor and enhance the skill set of junior team members Good to have: Automation skills like python modules. APL, CCSP. PGV generation flow knowledge Qualifications: B. Tech /B. E/M. Tech/M. E



  • bangalore, India ACL Digital Full time

    Job Description:Exp: 2 to 8 YearsLocation: BangaloreRole and Responsibilities:• Experience with at least one characterization tool (SiliconSmart/Liberate) for complete characterization of a library to generate the front end and back end views.• Understanding of CCS, ECSM liberty models,LVF, Verilog models, statistical characterization.• Understanding...


  • Bangalore, India ACL Digital Full time

    Job Description: Exp: 2 to 8 Years Location: Bangalore Role and Responsibilities: • Experience with at least one characterization tool (Silicon Smart/Liberate) for complete characterization of a library to generate the front end and back end views. • Understanding of CCS, ECSM liberty models, LVF, Verilog models, statistical characterization. •...


  • Bangalore, India ACL Digital Full time

    Job Description: Exp: 2 to 8 Years Location: Bangalore Role and Responsibilities: • Experience with at least one characterization tool (SiliconSmart/Liberate) for complete characterization of a library to generate the front end and back end views. • Understanding of CCS, ECSM liberty models,LVF, Verilog models, statistical characterization. •...


  • Bangalore, India Exiger Technologies Full time

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  • Bangalore, India Exiger Technologies Full time

    Development of the standard cell library from scratch and support of existing libraries PPA tradeoff between different cell circuit architecture in realistic usage environment Interface with the layout team to define the floor plan and layout guidelines for schematics; layout review to get optimum design Design and implementation of combinatorial, power...


  • Bangalore, India Exiger Technologies Full time

    Development of the standard cell library from scratch and support of existing libraries PPA tradeoff between different cell circuit architecture in realistic usage environment Interface with the layout team to define the floor plan and layout guidelines for schematics; layout review to get optimum design Design and implementation of combinatorial, power...


  • bangalore, India Exiger Technologies Full time

    Development of the standard cell library from scratch and support of existing librariesPPA tradeoff between different cell circuit architecture in realistic usage environmentInterface with the layout team to define the floor plan and layout guidelines for schematics; layout review to get optimum designDesign and implementation of combinatorial, power...


  • bangalore district, India Exiger Technologies Full time

    Development of the standard cell library from scratch and support of existing libraries PPA tradeoff between different cell circuit architecture in realistic usage environment Interface with the layout team to define the floor plan and layout guidelines for schematics; layout review to get optimum design Design and implementation of combinatorial, power...


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