Senior Engineer, Product Design Engineering

3 days ago


Bangalore, India eInfochips (An Arrow Company) Full time

Job Role: Physical Design Engineer- Senior/Lead Location: Experience Required: 5+ Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal integrity, Power grid analysis atc in ASIC PNR Flow Should be able to do full chip implementation of complex SoCs (RTL-to-GDSII), but it is not must. Will be responsible to Work with design teams for closing CTS, IO timing, DFT timing. Responsible for digital design automation, flow-automation and regression across RTL-to-GDSII. ESSENTIAL SKILLS & EXPERIENCE Minimum Experience required is 5 Years in Physical Design Strong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing, DRC-LVS closure, timing closure, antenna fixing, signal integrity on 65nm, 45nm, 28nm, 16nm geometry. Hands-on experience with Place and Route tools (Synopsys - ICC, Cadence – Innovus / Encounter) is a must. Experience on latest technology (28nm,16nm,7 nm) B.E./ B.Tech/ M.Tech in VLSI/Electronics/Electrical/Computer/Instrumentation Engineering. Ranked #102 on the Fortune List), is a leading global provider of product engineering and semiconductor design services. Company’s service offerings include Silicon Engineering, Embedded Engineering, Hardware Engineering & Digital Engineering services. eInfochips services 7 of the top 10 semiconductor companies and is recognized by NASSCOM, Zinnov and Gartner as a leading Semiconductor service provider.



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