Digital Circuit Timing Specialist

3 days ago

Nagpur, Maharashtra, India beBeeStatic Full time ₹ 90,00,000 - ₹ 1,20,00,000
Job Title: STA Lead

Summary of Role:

  • The primary goal of this position is to ensure the timing closure and quality of digital integrated circuits.

Key Responsibilities:

  • Perform thorough analysis of netlist and constraint sign-in checks and validation.
  • Develop and implement prime time constraints at full chip level, ensuring efficient clean up processes.
  • Utilize expert knowledge of multimode multi-corner timing to achieve timing closure at sub HM/block/top level.
  • Collaborate with cross-functional teams to implement sign-off static timing analysis in MMMC, considering Xtalk and OCV effects.
  • Develop ECO implementation strategies for netlist, RTL, and timing level changes using Perl/TCL scripting techniques.
  • Apply excellent debugging skills to resolve complex implementation issues and devise innovative solutions.
  • Familiarity with technologies from 28nm and below is highly desirable.
  • A minimum of 8+ years of experience is required for this role.
  • Demonstrate expertise in Synthesis & STA with a strong background in timing constraints.
  • Proficiency in Primetime or Tempus is acceptable.
About the Role:

Our organization seeks a seasoned professional with expertise in static timing analysis (STA) to join our team. The ideal candidate will possess a deep understanding of netlist and constraint sign-in checks, prime time constraints, and multimode multi-corner timing knowledge.

  • They must be able to develop ECO implementation strategies and possess excellent debugging skills.
  • Experience with technologies from 28nm and below is highly desirable.
  • Strong communication and teamwork skills are essential for success in this role.

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