Digital Design Engineer
6 days ago
This is an exciting opportunity for a seasoned Rtl Design Engineer to join our IC design team. As a senior engineer, you will be responsible for micro-architecting and implementing low-power communication system designs integrated into our System-on-Chip (SoC).
Your key responsibilities will include:
- Leveraging your expertise in digital signal processing hardware design to develop data path and control intensive digital designs.
- Collaborating with the System architect and other ASIC designers to implement low-power communication system designs.
Qualifications:
Required Qualifications:
- Bachelor's degree in Science, Engineering, or a related field.
- Minimum 3 years of experience in ASIC design, verification, or related work.
- Strong skills in Rtl logic design (VHDL or Verilog) and verification.
- Extensive experience with Rtl Linting tools and simulation tools.
- Experience with ASIC ECO flow, Rtl sanity tools specific to Design Rule Checking and Clock Domain Crossing checks.
- Familiarity with Built-In Self-Test (MBIST) and Design for Testability (DFT) flow.
- Gate level Simulation debug and usage of power extraction tools a plus.
- Tcl/Perl/Python shell-scripting skills.
- Experience with digital signal processing is a bonus.
- Knowledge of different wireless communication circuits is a plus.
- Outstanding communication and documentation skills.
- Experience with multi-power domain design using Unified Power Format (UPF).
- Power aware simulations using VCS-NLP or similar tools.
- Experience using Static Timing Analysis (STA), Place and Route (PNR) tools.
- Experience with Hardmacro integration in Rtl.
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