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Senior ASIC Design Verification Engineer

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Job Overview

This role involves developing and executing test plans for Advanced Semiconductor Integrated Circuit (ASIC) development using various tools and technologies.

Key Responsibilities
  • Developing test plans on an Advantest V93000 platform using SmarTest 8 for blocks/interfaces and functionality such as ADC/DAC, SERDES (CPRI, PCIE), ATPG, Boundary Scan, Programming LTU chip, Process Monitors, High Voltage Stress Testing, Very Low Voltage (VLV) Testing, IO Parametric Tests, IDD, Top Level Verification, Production Test & Yield Ramp, and Failure Analysis Support.
  • Executing tests to ensure quality and reliability of the ASICs.
  • Providing failure analysis support by creating debug routines and providing reports.
  • Ongoing optimization of test time, supporting binning, yield analysis.