Senior Full Chip Physical Design Specialist
2 days ago
We are seeking a skilled Physical Design Engineer to join our team. The successful candidate will be responsible for all aspects of Physical Design for Fullchip/Blocks covering Floorplanning, Placement, Budgeting, Clock Tree planning & analysis, Scan re-ordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure, ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, Low Power solution development & implementation.
Main Responsibilities:- Responsible for all aspects of Physical Design for Fullchip/Blocks
- Collaborate closely with the methodology team to resolve implementation challenges and provide inputsto improve the Physical design flow.
- Experienced in design automation, understanding of Timing constraints, SI prevention, Power reduction.
- Proficient in Unix/TCL/Perl.
- 4+ years experience in ASIC physical design
- Experience with block implementation, extraction, timing and or full-chip designs
- Strong communication skills
- Strong hands-on TCL/Perl development skills
PREFERRED QUALIFICATIONS: Experience as a full-chip floorplanning, routing, or timing lead for a large silicon project; Track record of taping out complex chips on advanced process nodes.
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