Optimal Circuit Designer

14 hours ago


Kannur, Kerala, India beBeeEngineer Full time ₹ 20,00,000 - ₹ 22,50,000
Job Opportunity:

We are seeking a specialist to develop memory compilers layouts and memory Fast Cache instances layouts for our next generation Cores, achieving exceptional Power Performance Area (PPA) balance.

  • Understanding of CMOS Transistors and their behaviors is essential
  • Knowledge of Power versus Performance versus Area trade-offs in typical CMOS design is necessary
  • Strong engineering skills and passion for circuit layouts are required

Required Skills and Qualifications :

  • Graduate or postgraduate degree from a reputable University or Engineering School in Electronic Engineering or equivalent field
  • Minimum 5 years of experience in SRAM / memory layouts creation and backend verifications including EMIR analysis

Nice To Have Skills and Experience :

  • Basic programming skills in scripting languages such as Perl or Python
  • Experience working with Cadence or Synopsys flows is beneficial
Why this role?

This opportunity requires a dedicated professional who can excel in a challenging environment and drive the development of innovative memory solutions. The successful candidate will have a strong technical background and excellent problem-solving skills.



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