
Senior ASIC Verification Engineer
2 weeks ago
Job Opportunity: Senior ASIC Verification Engineer
Description of the Position:We are seeking a highly skilled and experienced Senior ASIC Verification Engineer to contribute to the development of verification environments using industry-standard protocols and methodologies.
The successful candidate will be responsible for reviewing and signing-off VIP development and updates from a technical perspective, including methodology and protocol functional aspects.
Responsibilities:- Design and develop verification environments utilizing industry-recognized protocols and methodologies.
- Evaluate and validate VIP development and updates to ensure alignment with technical specifications.
- Collaborate with architects and methodology experts to resolve technical issues or drive output from an architecture/methodology standpoint.
- A minimum of 5-15 years of experience in multiple roles, with hands-on expertise in System Verilog and Verilog.
- A strong understanding of Object Oriented Programming principles.
- Experience with VMM/OVM/UVM methodologies and reusable verification environments.
- Familiarity with various protocols such as UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol.
Applicants should submit their updated CVs for consideration.
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