Design for Testability

Company OverviewPrinco Solutions is a prominent staffing and service-based organization, specializing in IT solutions and delivering top talent to meet client demands. We focus on workforce solutions, technology services, and business consulting, supporting businesses to scale effectively and optimize their operations. Our offerings include IT staffing,...

Key ResponsibilitiesThe Design for Testability Architect will be responsible for developing and deploying DFT methodologies for our next generation products. This includes working with physical designers to validate the DFT timing constraints, RTL designers to verify test design rules, and test engineers to bring up the patterns on ATE Automated Test...

The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We...

About Semi LeafSemi Leaf is a leading technology company that specializes in design for testability (DFT) solutions. Our team of experts works with clients to develop comprehensive DFT plans and implement them throughout the design flow.Job DescriptionWe are seeking an experienced Design for Testability (DFT) Engineer to join our team. The successful...

The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We...

Job Description:Job Title: DFT Engineer/DFT Design Engineer/Design for TestabilityExperience - 4 years to 15 yearsKey Responsibilities:Interface with ASIC design teams to ensure DFT design rules and coverages are met.Generate high-quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test...

:- Accountable for innovative DFT implementation(Scan, MBIST, LBIST & Boundary Scan) at the RTL and Gate level for a given SOC at Hard macro and chip top level.- Generate and validate ATPG patterns using simulations.- Shall Validate the DFT implementation using RTL and Gate level simulation.- Work with Multi-functional Teams on STA, Synthesis, LEC, CLP,...

Job Description:To design, develop, and test complex digital systems using industry-leading tools and methodologies.To collaborate with cross-functional teams to identify and prioritize project requirements.To ensure timely delivery of projects while maintaining high standards of quality and accuracy.

Key ResponsibilitiesThe successful candidate will be responsible for:Developing automation scripts using Tcl, Perl, or Python to improve DFT workflowsImplementing scan compression techniques using SEQ, Ultra, or TestKompressGenerating ATPG patterns using TetramaxPerforming ATPG diagnosis, ATE debug, and supporting silicon bring-up activitiesHandling DFT...

About the RoleWe are looking for a highly skilled DFT Architect and Test Development Specialist to join our team. The ideal candidate will have a strong background in Digital Forensic Technology (DFT) and experience with test development.ResponsibilitiesInterface with ASIC design teams to ensure DFT design rules and coverages are met.Generate high-quality...

Minimum qualifications:+ Bachelor's degree in Computer Science, Electronics or Electrical Engineering, or equivalent practical experience.+ 5 years of experience in ASIC design for test including complete silicon life cycle through DFT pattern bring-up on ATE and manufacturing.+ Experience with ATPG, Low Power designs, BIST, JTAG, IJTAG tools and flow.+...

Design for Testability (DFT) methodologies and toolsTessent-based DFT tools (preferred) or CadenceScan insertion and simulation methodologiesTSMC 3nm & 5nm technology nodes

Key Responsibilities:Implement and optimize DFT methodologies for advanced semiconductor designs.Perform ATPG and scan insertion to enhance test coverage.Analyze and debug simulation results related to DFT implementation.Collaborate with design and verification teams to ensure seamless DFT integration.

Minimum qualifications:+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.+ 5 years of experience in DFT/DFD flows and methodologies.+ Experience working with fault modeling, test standards and industry DFT/DFD/ATPG tools and with Application-Specific Integrated...

We are seeking a skilled Design for Test (DFT) Engineer to join our dynamic team. The DFT Engineer will play a crucial role in ensuring the testability and manufacturability of our integrated circuits (ICs). The successful candidate will collaborate closely with the design, verification, and test teams to develop and implement DFT techniques that optimize...

We are seeking a skilled Lead Design for Test (DFT) Engineer to join our dynamic team. The Lead DFT Engineer will play a crucial role in ensuring the testability and manufacturability of our integrated circuits (ICs). The successful candidate will collaborate closely with the design, verification, and test teams to develop and implement DFT techniques that...

Responsibilities:Design and develop microarchitectures for various subsystems, including CPU, low-power, reset, and clock management.Integrate System-on-Chip (SoC) designs for automotive MCUs.Collaborate with IP teams, systems architects, and engineers to derive requirements and co-develop microarchitectures for various IPs, subsystems, and SoCs.Work closely...

Job Description:We are seeking an experienced Senior DFT (Design for Testability) Engineer to join our team in Bengaluru. The ideal candidate should have 5+ years of hands-on experience in DFT methodologies, ATPG, and scan insertion, with expertise in Tessent or Cadence tools.

**Job Description:** We are looking for an experienced CPU Micro-architecture and RTL Design Engineer to join our team. Your primary responsibilities will include:Performance exploration: Work with the CPU modeling team to explore high-performance strategies.Microarchitecture development and specification: From early high-level architectural exploration to...

About the RoleSamsung Semiconductor is seeking a talented DFT specialist to join our team. As a DFT Specialist for High-Speed Designs, you'll be responsible for designing and implementing digital full-chip test solutions for high-speed ASIC designs.Your key responsibilities will include:Developing and implementing DFT solutions for high-speed ASIC...