Senior Hardware Verification Engineer
4 weeks ago
Job Summary
We are seeking a highly skilled Senior Hardware Verification Engineer to join our team at ADCI - BLR 14 SEZ - F07. As a key member of our advanced engineering and research team, you will be responsible for designing and implementing verification methodologies for world-class hardware.
Key Responsibilities
- Develop and implement verification methodologies and test bench infrastructure in advanced HVL to verify complex digital design blocks.
- Collaborate with architects, HW and SW developers to resolve blocking issues and deliver functionally correct design blocks.
- Create and enhance constrained-random verification environments using SystemVerilog and UVM, and write SVA.
- Identify and write all types of coverage measures for stimulus and corner-cases, and debug tests with design engineers.
- Participate in test plan and coverage reviews, and close coverage measures to identify verification holes and show progress towards tape-out.
Requirements
- Bachelor's degree or higher in EE, CE, or CS.
- 5+ years of hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology.
- Experience developing UVM test bench, writing testplan, developing tests and verifying the design.
- Experience with writing directed/constrained-random tests, identifying bugs in architecture, functionality and performance, and strong overall debug skills.
- Experience verifying at multiple levels of logic from SoCs to full system testing, and with industry standard tools and scripting languages (Python or Perl) for automation.
Preferred Qualifications
- Experience with CPU based verification.
- Experience with high performance industry standard IO interfaces like AMBA AXI4, USB, MIPI etc.
- Domain knowledge in image/video processing.
- Strong programming skills in C/C++ and scripting skills in Python and/or Perl.
- Excellent verbal and written communication skills.
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