Verification Engineer
1 day ago
We are seeking a skilled Verification Engineer to develop and execute test plans for complex ASIC designs.
- Develop test plans using System Verilog (SV) and UVM methodologies
- Perform functional, formal, GLS (Gate-Level Simulation), power, and CPU verification
- Conduct IP and subsystem-level verification
To succeed in this role, you must have strong debugging skills, excellent communication abilities, and the ability to work closely with RTL designers.
Benefits:
- Competitive salary and benefits package
- Opportunities to work on cutting-edge technology and projects
- Collaborative and innovative work environment
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