
Timely Design Engineer
3 days ago
Timing Closure Specialist
This is a highly skilled role that requires expertise in synthesis and static timing analysis.
Key Responsibilities:- Collaborate with RTL designers to develop and refine constraints for optimal design performance
- Drive design efficiency and optimization, leveraging advanced features of Design Compiler and PrimeTime SI
- Provide technical leadership in low-power design methodologies, including UPF/CPF, clock gating, and logic optimization
- Integrate high-speed interfaces such as DDR and PCIe into designs
- A strong understanding of timing closure and its challenges in multi-clock designs
- Proficiency in Synopsys/Cadence tools and ability to leverage their advanced features
- Expertise in low-power design and integration of high-speed interfaces
- Excellent scripting, communication, and debugging skills
The ideal candidate will possess a strong background in digital circuit design, with experience in synthesis, static timing analysis, and low-power design. If you have a passion for driving design excellence and have a keen eye for detail, we encourage you to apply for this exciting opportunity.
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