
Digital Circuit Verification Expert
7 hours ago
We are seeking an experienced Verification Engineer to join our team in designing and verifying digital circuits using Verilog/SystemVerilog.
Main Responsibilities:- Develop and implement verification environments for complex digital systems
- Design and verify Global Lock Step (GLS) architecture
- Collaborate with cross-functional teams to integrate verification results into the overall design flow
Key Requirements:
- Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering or equivalent
- 4+ years of experience in digital verification, with a focus on GLS
- Strong knowledge of Verilog/SystemVerilog and SDF concepts
PREFERRED SKILLS AND EXPERIENCE:
- Familiarity with EDA tools such as Synopsys VCS, Cadence Xcelium, Mentor Questa
- Understanding of timing analysis, synthesis, and place & route (PnR) flow
- Experience handling X-checking, reset verification, and glitches in gate-level simulation
Why this role?
This is a fantastic opportunity to work on cutting-edge digital circuit design and verification. As a Verification Engineer, you will have the chance to collaborate with our talented team and contribute to the development of innovative technologies.
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