IC Design Engineering Lead for Cutting-Edge Mixed Signal Chip
3 weeks ago
Eteros Technologies, a pioneering Semiconductor Engineering services startup based in the Silicon Valley, is seeking an experienced IC Design Engineering Lead to spearhead the development of an advanced mixed signal chip.
As a top-level lead, you will be responsible for leading the implementation of a complex mixed-signal SoC, building and guiding a team of implementation engineers, working with external IP vendors to integrate blocks into the design, and ensuring that each aspect of the design meets the specified requirements.
This is an exceptional opportunity for a senior-level engineer to work on cutting-edge technologies, contribute to groundbreaking new hardware technology, and deliver results in a fast-paced startup environment.
The ideal candidate will have a strong background in all phases of the IC design process from RTL->GDS2, experience in analog/mixed/custom signal PNR, preferably TSMC 7nm PNR sign-off experience using a full COT flow from RTL/gate to GDS, and hierarchical place & route experience.
A BTech/MTech/PhD degree with 5-10 years' experience in chip implementation and 3-5 years as a top-level lead is required. Proven track record with multiple successful final production tape-outs at 16/14nm, 10nm, preferably 7nm, knowledge of embedded processors, high-speed interfaces, and memory controllers, ability to contribute to and guide the development process to meet stringent industry segment requirements, and experience with automotive-qualified designs are highly desirable.
Competitive compensation ($160,000 - $220,000), medical benefits, and opportunities for career development and growth make this an attractive offer for a seasoned professional looking to take their skills to the next level.
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