Digital Fault Tolerance Engineer Wanted
1 week ago
We are seeking a skilled DFT engineer to join our team at Sykatiya Technologies Pvt Ltd. The successful candidate will be responsible for designing and implementing Digital Fault Tolerance solutions for complex System-on-Chip (SoC) designs.
Key Responsibilities:- Broad experience in DFT, 3-15 years of expertise
- Experience in DFT and Automatic Test Pattern Generation (ATPG) activities on SoC designs, including MBIST planning/insertion, partitioning design for scan, scan insertion, compression, wrapper insertion, and ATPG simulations
- Expertise in handling flat/hierarchical SoC designs
- Expertise in JTAG, Boundary Scan, and Static Timing Analysis (STA) constraints creation for DFT modes
Sykatiya Technologies is a leading provider of engineering services, specializing in Disruptive Technology for Ultra Low Power Optimization. Our team of experts delivers high-quality projects, helping customers achieve their goals and stay ahead of their competition.
Compensation:$120,000 - $180,000 per year, based on experience and qualifications.
Job Requirements:- Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field
- Strong understanding of digital design principles and DFT concepts
- Excellent problem-solving skills and attention to detail
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