Senior Design Enablement Lead

2 weeks ago

Hyderabad, Telangana, India Micron Full time

About Micron

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Our Vision

We envision a future where technology enriches life for all. To achieve this vision, we need talented individuals like you to join our team.

Job Description

We are seeking an experienced Senior Design Enablement Lead to play a key role in the development of our next-generation DRAM products. In this position, you will be responsible for coordinating the work of engineers from multiple groups and geographies to develop Design Rules, Requirements, Test Structures, and improve process margin for all DRAM generations.

Responsibilities:

  • Coordinate cross-functional teams to develop design rules, requirements, and test structures for DRAM products
  • Manage effort to build and evaluate test structures to provide data for next-generation devices and quantify process margin on current devices
  • Define project sub-milestones within layout schedules and work with teams to achieve targets and timelines
  • Proactively identify and address process issues and window vs. die size issues stemming from specific database layout or layout techniques
  • Partner with Design, Product Engineering, Process Integration, Business Units, and Quality groups to optimize PPAC (Performance, Power, Area, Cost) for all Micron DRAM products
  • Assure that the right DRCs (Design Rule Checks) are in place and react appropriately to deviations from established design rules
  • Strategically partner with multiple teams and fields to understand process issues related to database layout and prioritize development of solutions with Process Integration, Advanced Mask Design, Scribe & Frame, Layout & Design
  • Summarize sophisticated problems, derive, and explain actions taken to address them
  • Drive effective multi-functional communication on issue resolution and support across node Design Rule alignment
  • Maintain and implement meaningful communication between Process Integration, Product Engineering, Design, and Advanced Mask teams
  • Improve timely documentation of R&D activities with regard to design rule improvements for transfer to parts still in design

Qualifications:

  • BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field
  • Senior-level experience (5+ years) in the semiconductor industry in areas such as Process Integration, Yield Enhancement, Product Engineering, Design, Test Structure Development, or Unit Process Development
  • Solid grasp and exposure to design & layout with the ability to do minor layout, work with Pcells desired
  • Experience with Test Structure Design and characterization
  • Success in resolving sophisticated issues
  • Think and communicate clearly in urgent and stressful situations
  • Possess a deep understanding of the DRAM process flow, as well as the function and purpose of major DRAM components, such as Sense Amp, Word-line driver, and Anti-Fuse
  • Exposure and familiarity with CAD group interactions, data post-processing, and the process of transferring data from the database to the reticle

Salary Range: $150,000 - $200,000 per year, depending on location and experience.

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