Senior ASIC Development Engineer
4 weeks ago
Job Summary
We are seeking a highly skilled Senior ASIC Development Engineer to join our team at Western Digital. As a key member of our ASIC design team, you will be responsible for designing and developing high-performance ASICs for storage applications.
Key Responsibilities
- Design and develop high-performance ASICs for storage applications using Verilog and SystemVerilog.
- Develop and maintain RTL designs, including synthesis, timing, and full chip netlist.
- Collaborate with cross-functional teams to define requirements for ASIC design, verification, and physical implementation.
- Evaluate area, performance, power, and ease-of-implementation trade-offs between different implementation solutions.
- Review and configure 3rd party IPs and support other teams in the ASIC organization.
- Support product teams with documentation, code-reviews, and silicon debug.
Qualifications
- Bachelor or Master degree in Electronics, VLSI, or Micro-Electronics Engineering.
- 9+ years of ASIC design and architecture experience with strong knowledge of USB, SD, PCIe, NVMe, and/or UFS in a storage application.
- RTL design experience in Verilog and SystemVerilog.
- Knowledge and experience in various aspects of SOC design, verification, and implementation flows.
- Experience with low-power design techniques.
- Ability to read and understand SW code.
- Understanding of CPU and memory architectures, datapath pipelining mechanisms, distributed system design, ASIC low-power implementations, clock and reset methodologies.
- Excellent logic design and debug skills; proficiency in protocols like SATA, USB, PCIe; knowledgeable in bus protocols like AHB, AXI, I2C, UART, JTAG, CJTAG.
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