Senior Quantum Hardware Design Engineer

2 days ago


Bengaluru, Karnataka, India QpiAI Full time
Cryogenic RF/Analog IC Design Engineer

About QpiAI

QpiAI is one of the pioneering quantum computing companies from India. Our vision at QpiAI is to develop a complete quantum computing stack, along with integrating it with specialized optimization hardware and GPU accelerators. You can learn more about us on our website.

The Quantum Hardware Team is responsible for designing Cryogenic Quantum Control Circuits, RF Control Hardware, and QpiAI ASGP. As a Senior Cryogenic IC Design and characterization engineer, you will be involved in designing the analog frontend for qubit control and readout that operates at extremely low temperatures (~4 Kelvin).

Job Description:

This role offers an opportunity to work on scalable quantum hardware for a full-stack quantum computer. As a Senior Cryogenic IC Design and characterization engineer, you will be involved in designing the analog frontend for qubit control and readout that would operate at extreme low temperatures (~4 Kelvin).

Key Responsibilities:
  • Designing cryogenic CMOS Analog/RF ICs for qubit control and readout.
  • Characterizing devices using DC, CV, and RF (S-parameters and noise measurement) techniques.
  • Extracting BSIM4/4.5 models for 40nm/28nm/22nm technology nodes.
  • Working with foundry PDK teams for developing device structures for diodes, MOS/BJT transistors, passives, and other components.
  • Designing and simulating analog/RF frontend blocks such as LNAs, TIAs, mixers, LOs, ADCs, DACs.
  • Performing worst-case analysis, top-level simulation, Monte-Carlo simulation, and design optimization.
  • Laying out and post-layout verification of the block (standalone and integrated with signal chain).
  • Coordinating tape outs for analog RF signal chain components.

Requirements:
  • A Master's degree or PhD in Electronics/Applied Physics with at least 2 years' experience in cryogenic CMOS Analog/RF IC design and characterization.
  • Experience in CMOS device modeling at room temperature or cryogenic temperature (at least one of the technology nodes: 65nm/40nm/22nm).
  • Expertise in EDA tools for analog and RF design (Cadence, Mentor, Synopsis).
  • Familiarity with Linux systems and scripting languages (TCL/Python).
  • Strong problem-solving skills, good communication skills, and teamwork ability.

Estimated Salary Range:
$120,000 - $180,000 per annum, depending on qualifications and experience.

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