
Expert Design Verification Specialist
17 hours ago
As a seasoned Design Verification Engineer, you will be responsible for ensuring the highest quality and functionality of our digital products. We are seeking an expert with a strong background in design verification, debug, and test planning.
- Job Responsibilities:
- Develop comprehensive test plans to validate our digital designs.
- Collaborate with cross-functional teams to ensure timely completion of projects.
- Conduct thorough analysis and debugging of Netlist functional failures.
- Work closely with engineers to resolve technical issues and improve design quality.
- Stay up-to-date with industry trends and advancements in design verification methodologies.
- Requirements:
- Bachelor's or Master's degree in Electronics and Communication Engineering, Computer Science, or related field.
- At least 3-5 years of experience in design verification with hands-on experience in GLS, ZD/PAGLS/SDF/Scan dump verification.
- Strong expertise in Debug, UVM, System Verilog, and Digital Fundamentals.
- Excellent understanding of Low Power Aware verification, Timing Simulation failure, setup and hold violation fundamentals, Scan dump verification, Specs and Standards.
- Proficient in creating monitors, scoreboards, sequencers, and sequences that utilize scripts, System Verilog, UVM, and methodologies.
- Good knowledge of DDR families (LP/PC) and generations (DDR2/3/4/5), Bus protocols like AHB/AXI/ACE/ACE-Lite.
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