Technical Lead: Design Verification
1 week ago
**Job Overview**
We are seeking a skilled Design Specialist to develop and execute pre-silicon verification test plans for DFT features of the chip.
The ideal candidate will have strong expertise in Verilog, SystemVerilog (SV), SVA, UVM verification methodologies and C++ with 3-6 years of experience in DFT feature verification. They should possess strong debug skills and experience with debug tools such as Verdi.
In addition to technical expertise, the successful candidate will have excellent written and verbal communication skills, as well as strong analytical/problem solving skills and pronounced attention to details.
Key Responsibilities:- Verify DFT design blocks and subsystems using complex SV or C++ verification environments.
- Construct SystemVerilog and/or C/C++ models and test sequence libraries for simulation.
- Build test bench components including agents, monitors, scoreboards for DUT.
- Compose tests, assertions, checkers, validation vectors and coverage bins to ensure verification completeness.
- Debug regression test failures to expose specification and implementation issues.
- Develop high coverage and cost-effective test patterns.
- Take part in ATE bring-up.
Post silicon ATE and System level debug support of the test patterns delivered.
Responsibilities also include optimizing the test patterns to improve the test quality and reduce test costs.
**Requirements:**
- Minimum Engineering Degree in Electronics/Electrical/Computer Science
- Effective team player
- Motivated and detail-oriented individual
- Passion for verification
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