DFT Engineer
4 days ago
Role Summary
">D2N Solutions is seeking a seasoned DFT Engineer to spearhead the development and implementation of cutting-edge test architectures for complex ICs, including SoCs, ASICs, and custom chips.
">Key Responsibilities:
">- Define and implement DFT architectures that meet stringent test coverage goals.
- Develop and optimize test strategies, incorporating scan, BIST, and boundary scan techniques.
- Collaborate with cross-functional teams to integrate DFT requirements into overall design flows.
- Implement various DFT techniques, such as scan insertion, ATPG, boundary scan, and memory BIST.
- Integrate DFT structures into RTL code and verify design correctness using simulation and formal methods.
- Work closely with physical design teams to ensure successful insertion of test structures into final layouts.
- Generate and validate test patterns using ATPG tools to ensure high fault coverage for manufacturing tests.
- Ensure generated test patterns meet testability requirements and are optimized for production test cost and time.
- Debug test patterns and work with silicon validation teams to ensure they function correctly on final products.
- Perform fault coverage analysis to identify test coverage gaps and develop strategies to close them.
- Ensure designs meet or exceed target test coverage and test cost goals, optimizing test time and yield.
- Conduct simulations to verify functionality and integrity of DFT structures.
- Support post-silicon testing and bring-up by diagnosing test failures and debugging issues related to DFT features.
- Work with test engineers to optimize test programs for volume production and yield improvement.
- Provide feedback to design teams to improve DFT methodologies for future products.
Requirements:
">- Strong experience in DFT techniques, such as scan insertion, ATPG, JTAG, boundary scan, and BIST (Logic BIST and Memory BIST).
- Proficiency with DFT EDA tools, such as Synopsys DFTMAX, Mentor Tessent, or Cadence Modus.
- Solid understanding of fault modeling, fault coverage metrics, and test pattern generation.
- Experience in Verilog/VHDL for RTL coding and modifications related to DFT structures.
- Strong understanding of ASIC/SoC design flows, including synthesis, timing closure, and physical design integration.
Salary Range:
">$120,000 - $180,000 per annum, depending on experience.
">About Us:
">D2N Solutions is a leading provider of innovative engineering solutions, driving the development of cutting-edge technologies. Our team of experts collaborates to deliver high-quality results, meeting the evolving needs of our clients.
">Benefits:
">We offer a competitive salary package, opportunities for growth and professional development, and a dynamic work environment that fosters collaboration and innovation.
">Location:
">This role is based in [location], with opportunities to work on exciting projects and collaborate with talented professionals in the field.
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