
Senior RTL Design and Verification Expert
9 hours ago
We are seeking highly skilled engineers with expertise in ASIC/IP design and logic design/RTL design.
Key Requirements:
- 7+ years of experience in ASIC/IP Design
- Familiarity with tools such as Lint, CDC, Synthesis, Spyglass
- Proficiency in AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture
Design Verification Engineer Responsibilities:
- IP verification using SV/UVM
- SOC verification using C/SV
- Third-party VIP integration
- Interconnect protocols: AHB, AXI, APB
- Coverage closure: Code, Functional and Toggle
- Tools: Synopsys VCS or Cadence Incsive
We offer a challenging and rewarding work environment. Interested candidates, please share your updated CV.
Benefits
- Opportunity to work on high-profile projects
- Collaborative team environment
- Continuous learning and professional growth
Our ideal candidate should have:
- Strong technical skills in RTL design and verification
- Excellent problem-solving skills and attention to detail
- Good communication and teamwork skills
We encourage candidates to apply who meet the following qualifications:
- Bachelor's degree in Computer Science or related field
- Experience working with digital design and verification tools
- Familiarity with coding languages such as C/C++
To succeed in this role, you will need:
- Ability to learn new technologies quickly
- Strong analytical skills and ability to troubleshoot complex issues
- Effective communication and collaboration skills
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