Senior IC Architect
2 days ago
We are seeking a highly skilled and motivated Senior IC Architect to lead the overall chip architecture and design execution. This individual will be responsible for overseeing the entire design process, from RTL freeze to GDSII delivery.
Key Responsibilities- Owns multi-block design integration
- Manages handoff and sign-off of key stages: RTL freeze, synthesis, place & route, static timing analysis, and DFT
- Drives IP integration, clocking strategy, power domain definition
- Cross-Functional Collaboration
- Identifies and mitigates design and schedule risks
- Engages with external IP vendors, EDA tool providers
- Bachelor's in Electrical Engineering, Electronics, or Computer Engineering
- Master's or PhD in VLSI Design, Microelectronics, or Computer Architecture (preferred)
- Certifications - advanced coursework or certification in SoC design or project management is beneficial
- Strong background in:
- Digital IC design (RTL to GDSII)
- System-level architecture and IP integration
- Timing closure (STA) and power-performance-area (PPA) optimization
- UPF/CPF for low-power design
- Familiarity with design for manufacturability, test (DFT), and silicon debug
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