Senior Design Verification Engineer

4 weeks ago

Bangalore, India Blue Silicon Infotech Private Limited Full time
Job Title: Senior Design Verification Engineer

This role is responsible for enhancing and growing our Design Verification team. The ideal candidate will have a strong background in Design Verification and System Verilog, with experience in writing UVM test benches and verifying coverage.

Key Responsibilities:
  • Define and build benches for our designs from scratch, automating reporting as well as working with designers to find bugs to speed up the development cycle.
  • Creatively solve verification requirements with the right tool, i.e., UVM, System Verilog, or lab testing with firmware.
  • Create test benches and test cases to meet all verification requirements.
  • Strong problem-solving skills and ability to direct the design team toward the problematic area of the design.
Requirements:
  • A minimum of 3-8 years of experience in Design Verification and System Verilog.
  • A minimum of 3-8 years demonstrating experience in writing UVM test benches and verifying coverage.
  • Demonstrated communication skills in a high-performing development environment.
  • Experience with 3rd-party IP blocks: DDR, PCI, NAND, or AXI.
  • Self-Starter, ready to move quickly to keep the design moving forward.
Preferred Requirements:
  • Natural inclination for Verification and Testing with a desire to break the designs.
  • Experience with Cadence VManager.
  • Driving projects with RTL/HW engineers.
  • Experience with System Verilog assertions.
  • Python experience.

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