
Chief AI Systems Architect
2 days ago
Are you passionate about innovation and creating world-class products?
We are seeking an experienced Principal IP/RTL Design Engineer to collaborate with cross-functional teams in defining and implementing next-generation AI architectures.
The key responsibilities for this role include:
- Design and implement high-performance TPUs/MPUs and other related AI blocks using RTL.
- Own IP/block-level RTL from spec to GDS, including design, synthesis, and timing closure.
- Optimize design for power, performance, and area (PPA).
- Interface with physical design and DFT (Design for Test) engineers for seamless integration.
- Drive design reviews, write design documentation, and support post-silicon bring-up/debug.
Minimum Qualifications
- B.S./M.S./Ph.D. in ECE/CS from top engineering colleges with 5-15 years of related experience.
- Previous experience in either high-performance processor design or AI accelerator design is a plus.
- Clear understanding of floating-point arithmetic, vector processing, SIMD, MIMD, VLIW, EPIC concepts.
- Strong grasp of digital design fundamentals, computer architecture, virtual memory, and high-speed data-path design.
- Proficiency in Verilog/SystemVerilog and simulation tools.
- Experience with EDA tools (e.g., Synopsys, Cadence) for synthesis, lint, CDC, and timing analysis.
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