Chief SoC Architectural Specialist

6 days ago

Bengaluru, Karnataka, India beBeeVerification Full time ₹ 1,04,000 - ₹ 1,30,878

Job Description

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As a leading professional in the field of SoC design verification, you will be responsible for collaborating with various teams to understand architecture and verification requirements. You will develop detailed test plans based on architectural specifications, ensuring that the design is thoroughly tested and verified.

Responsibilities

  • Collaborate with Architecture, Design, Functional DV, Emulation, Platform Debug, etc., teams to comprehend architectural and verification demands.
  • Develop detailed test plans based on architectural specs.
  • Understand and work with SoC design and architecture.
  • Apply 10+ years of expertise in Design Verification along with extensive knowledge in Verilog, System Verilog, C, and UVM/OVM.
  • Be capable of creating Testbenches. Understand verification environments including requirements, methodology, stimulus, checkers, scoreboards, coverage aspects. Develop functional coverage & assertions.
  • Own the DV sign-off and ensure a bug-free design.
  • Work with post-silicon teams on debug support and help root-cause any failures.
  • Have worked on wireless protocol design verification.
  • Bring up Testbench/SoC verification environment. Have good understanding of SoC RESET/CLOCK flow.
  • Exposure to DEBUG concepts such as JTAG, etc.
  • Be comfortable with VCS/Verdi and have excellent debug skills.
  • Be logical in thinking and able to gel well within a team.
  • Have good communication skills.
  • Continuously drive methodology improvements to enhance efficiency.
  • Mentor junior engineers to build a high-performing team.

Preferred Experience

  • Proficient in SoC/sub-system/IP level ASIC verification.
  • Proficient in debugging firmware and RTL code using simulation tools.
  • Proficient in utilizing UVM testbenches.
  • Experienced with Verilog, System Verilog, C, and C++.
  • Worked on High Speed Interfaces like PCIe/DDR/USB/Other, have good understanding of AXI/AHB/APB Bus protocol.
  • Prior knowledge of ARM/RISC Processor-based designs verification and bring-up verification.
  • Develop UVM-based verification frameworks and testbenches, processes, and flows.
  • Good understanding and hands-on experience in UVM concepts and SystemVerilog language.
  • Scripting language experience: Perl, Python, Makefile, shell preferred.

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