Senior ASIC Design Verification Engineer
3 weeks ago
Squareroot Consulting Pvt Ltd. is seeking a highly skilled ASIC Engineer/Lead to lead our Design Verification efforts. As a key member of our team, you will be responsible for defining and implementing IP/SoC verification plans, building verification test benches, and driving design verification to closure.
Key Responsibilities- Develop and implement verification plans, test benches, and functional tests to ensure high-quality design
- Collaborate with cross-functional teams to ensure design quality and meet project deadlines
- Debug and resolve functional failures in the design, partnering with the design team
- Architect and implement design verification infrastructure and execute the full verification cycle
- Lead the verification-based design and development solutions, leveraging Agile/Scrum methodology
- 5+ years of hands-on experience in System Verilog/UVM methodology and/or C/C++ based verification
- Experience with Cadence EDA tools, such as Xcelium, Jasper Formal Verification Platform, and scripting languages like Python, TCL, Perl, and Shell
- Track record of 'first-pass success' in ASIC development cycles
- Knowledge of Agile/iterative development processes and proficiency in Agile/Scrum methodology
- Hands-on experience in leading small teams and handling customer calls
- Experience with API-based system integration is an added advantage
Squareroot Consulting Pvt Ltd. offers a dynamic work environment, competitive compensation, and opportunities for growth and development. If you are a motivated and experienced ASIC Engineer/Lead looking for a new challenge, we encourage you to apply.
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