High-Speed RTL Design Expert
6 days ago
We are seeking a talented Senior Digital Design Engineer to join our team at M/s Angel and Genie (Talent Search Company). This role involves working on high-speed IPs and CPUs, requiring expertise in uArch design, RTL coding, quality checks, and integration of complex ASICs/SoCs.
Key Responsibilities:
- Designing micro architectures for high-performance applications.
- Coding RTL designs for ASIC and SoC projects.
- Collaborating with architects and physical design teams to achieve design goals.
- Optimizing RTL designs for performance, power, and area (PPA) metrics.
- Participating in design reviews and contributing to the overall design methodology improvements.
Qualifications:
To be successful in this role, you will need:
- A minimum of 4-15 years of hands-on experience in RTL design and integration with high-speed IPs.
- Proficiency in Verilog/System Verilog/Chisel coding and familiarity with RTL simulation tools.
- Solid understanding of ASIC and SoC design flows and methodologies.
- Good experience and knowledge in integrating one or more of the following high-speed IPs/interfaces: DDR (LPDDR 4/5/6, GDDR6), PCIe Gen 4/5/6, CXL 2/3, UCIe, Ethernet 100G/200G/400G/800G, Coherent Interconnects like ARM CMN, CPUs like ARM Cortex X4, A7xx, A5xx, A7x, A5x series, Neoverse N2.
- Good knowledge in one or more of the following protocols/specifications: PCIe Gen4/5/6, CXL 2/3, UCIe, Ethernet, AMBA CHI.
- Good experience and knowledge in Linting, CDC, and Synthesis.
- Strong analytical and problem-solving skills.
- Excellent communication and teamwork abilities.
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