
Expert Verification Specialist
1 week ago
We are seeking a skilled Verification Specialist to ensure the functionality and performance of our complex digital systems.
The ideal candidate will have a strong background in verification methodologies and experience with ASIC/SOC design. They should be proficient in languages such as SystemVerilog and UVM, and have a good understanding of power intent and SoC clock/reset architecture.
Key Responsibilities:- Develop test cases and perform performance analysis for DSP subsystems, including exposure to Neural Network Engines (NNE).
- Verify end-to-end Debug Subsystem designs, including RTL DV, GLS, coverage closure, and ARM CoreSight Debug Architecture.
Candidates with experience in CPU debug systems, trace, and crash debug will be preferred. A strong understanding of C, SV, UVM, and expertise in designing verification plans (VPlan) is also required.
Requirements:- 2 Engineers (6 yrs), 1 Engineer (4 yrs) for End-to-End Power Verification.
- 2 Engineers (6 yrs, 4 yrs) for DSP Subsystem Verification.
- 2 Engineers (6 yrs), 1 Engineer (2 yrs) for Debug Subsystem Verification.
- Power-aware verification with UPF.
- Verification of leakage, sleep, clock tree, active use cases.
- Clock & reset verification (glitch, freq, spec compliance, multiple paths).
- Power switch coverage analysis.
- Strong DV (SystemVerilog, UVM), RTL + GLS with PG netlist.
- Understanding of power intent & SoC clock/reset architecture.
- DSP subsystem test case development & performance analysis.
- Processor knowledge (DSP preferred).
- Exposure to Neural Network Engines (NNE).
- Performance verification methods.
- C-based verification + strong SV/UVM knowledge.
- End-to-end Debug Subsystem verification.
- RTL DV, GLS, coverage closure.
- Understanding of ARM CoreSight Debug Architecture.
- Work with architecture & SW teams for debug requirements.
- Define Verification Plan (VPlan).
- CPU debug system understanding (trace, crash debug).
- Strong SV, UVM, C expertise.
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