
Design Verification Expert
2 weeks ago
We are seeking a highly accomplished engineer with a mastery of verification methodologies and the ability to drive the development and execution of comprehensive verification plans.
Main Responsibilities:
- Develop and execute verification plans utilizing industry-leading methodologies (UVM, Formal Verification)
- Create high-quality verification environments (testbenches) to achieve exceptional code coverage
- Utilize advanced verification tools (simulators, formal verification tools) to thoroughly verify RTL functionality
- Debug and analyze verification failures with a keen eye to identify and resolve the root cause of design issues
- Collaborate effectively with RTL design engineers to ensure efficient bug resolution and verification plan adherence
- Lead and mentor junior DV engineers within the team, fostering a collaborative and knowledge-sharing environment
- Participate in code reviews and champion best practices for verification code quality
- Stay current with the latest advancements in verification tools and methodologies
Key Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus)
- Minimum 7-10 years of solid experience in Design Verification for ASICs or SoCs
- In-depth knowledge of digital design principles (combinational logic, sequential logic, finite state machines)
- Proven ability to develop, debug, and optimize complex verification environments
- Expertise in Verilog or VHDL with a strong understanding of verification methodologies (UVM, Formal)
- Extensive experience with simulation tools (ModelSim, Cadence Incisive, Synopsys VCS) and scripting languages (Python, Perl)
- Experience with formal verification tools and techniques is a plus
- Excellent analytical and problem-solving skills with a meticulous attention to detail
- Strong communication, collaboration, and leadership skills to effectively contribute and guide the team
Job Requirements:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus)
- Minimum 7-10 years of solid experience in Design Verification for ASICs or SoCs
- In-depth knowledge of digital design principles (combinational logic, sequential logic, finite state machines)
About Us:
We value innovation, teamwork, and customer satisfaction.
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