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Low Power Architect

3 weeks ago

Bengaluru, Karnataka, India ACL Digital Full time

Achieving excellence in digital IC design requires a unique blend of technical expertise and creative problem-solving skills. At ACL Digital, we're looking for a Senior RTL Design Engineer who can leverage their experience in low-power design, microarchitecture, and tool proficiency to drive innovation and deliver exceptional results.

Responsibilities:
  1. Low-Power Design Expertise: Develop and optimize low-power digital ICs using Verilog, with a focus on microarchitecture, synthesis, timing closure, and low-power estimation.
  2. RTL Design Optimization: Enhance microarchitecture and RTL designs for area and power reduction, with experience in Arithmetic units, Floating-point datapath design, and optimization techniques.
  3. Tool Mastery: Demonstrate expertise in ASIC design tools such as VCS, Verdi, and Design Compiler, as well as power estimation tools and scripting languages like Shell, Perl, and Python.
  4. Architecture Exploration: Conduct thorough hardware architecture exploration and performance modeling, with experience in machine learning/artificial intelligence domain and/or DRAM memory controllers.
  5. Compliance and Quality: Ensure adherence to lint and CDC rules, with experience in delivering high-quality PCIe/CXL designs.

Join us at ACL Digital and contribute your skills and expertise to shaping the future of digital IC design.