
Gpu Timing Closure Specialist
18 hours ago
Job Title:
GPU Timing Engineer
DescriptionWe are seeking a highly skilled professional to join our team and assume the responsibility of setting up, executing and timing closure of GPU in Multi Voltage domain STA environment.
The successful candidate will be responsible for ensuring the quality of timing closure and identify potential design and constraints related issues. They should have experience in working with high frequency blocks like CPU/GPU (> GHz range) and strong understanding of DFT modes requirements for timing signoff.
In addition to the key responsibilities listed below, the candidate should have strong knowledge of physical design flow and ECO implementation. They should also be familiar with EDA tools such as Primetime, Tweaker/PrimeClosure and Innovus.
- Responsible for Multi Voltage domain STA environment setup, execution and timing closure of GPU
- Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks
- Ensuring timing correlation between PnR STA and timely feedbacks to PD team
- Generating block level HS session and using Top context from SoC for Block-SoC Interface timing closure.
- Generating timing ECO using Tweaker/PrimeClosure.
To excel in this role, you should possess the following skills and qualifications:
- 3+ years of experience in timing closure of high frequency blocks like CPU/GPU (> GHz range)
- Analyzing the timing reports and identifying both design and constraints related issues.
- Worked on blocks with multiple power and voltage domains
- Strong Understanding of DFT modes requirements for timing signoff
- Good understanding of physical design flow and ECO implementation
- Strong understanding of SDC constraints, OCV,AOCV,POCV analysis
- Strong TCL/scripting knowledge is mandatory.
You should hold a Bachelors or Masters degree in Electrical Engineering.
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