Distinguished Functional Test Design Engineer
7 days ago
Cadence is a dynamic company that innovates in the field of technology.
• This position requires collaboration with multiple cross-functional teams worldwide to ensure project alignment and goals.
• One of our key responsibilities is to mentor junior engineers and drive innovation and automation.
• A bachelor's or master's degree in engineering with 7+ years of relevant experience and a strong understanding of DFT principles and communication skills are required.
• Proficiency in industry-standard EDA tools is essential.
• Experience with logic simulators from one or more EDA vendors is a plus.
• Familiarity with industry-standard ATPG tools like Cadence Modus is desired.
• Knowledge of RTL lint tools like Jasper is beneficial.
• Skills in scan insertion, coverage analysis, and debugging for fault coverage enhancement are required.
• Proficiency in scripting languages like Perl, Tcl, or Python is a plus.
• Experience in post-silicon validation, ATE debug, and support is desired.
• Familiarity with the RTL2GDS flow and tasks like synthesis, scan insertion, STA, and IR drop is beneficial.
• Understanding of logic design, RTL implementation, and verification, logic synthesis, logic equivalent checking, and static timing analysis are pluses.
Cadence is committed to solving complex problems. Join us in making a meaningful impact.
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Distinguished Test Engineer
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Firmware Automation Test Engineer
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Firmware Automation Test Engineer
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Test Engineer
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