Advanced Technical Lead Position

2 days ago

Alleppey, Kerala, India beBeeEngineer Full time ₹ 2,00,00,000 - ₹ 2,50,00,000
Senior Staff Engineer Job Opportunity

We are seeking an exceptional Senior Staff Engineer to lead complex SoC/chip architectures with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture and multi-level caches, multiple clocks and resets, high-speed interfaces, peripherals.

This position involves the development of advanced SoC designs, including RISC-V, ARM or proprietary processor designs, and high-speed interfaces for off-chip memories, along with the integration of wireless systems, power management, and mixed signal IP.

Key Responsibilities:
  • Lead the development and execution of Wireless SoCs from definition, through execution, and into production.
  • Develop and maintain the SoC architecture or technical specification to meet product requirements, with a key goal to maximize IP reuse.
  • Develop the design schedule, including milestones and resource requirements. Coordinate with cross-functional teams (such as software) on dependencies.
  • Represent the design community to provide succinct weekly status and attend cross-functional meetings. Drive design action items to closure.
Required Skills and Qualifications:
  • 12+ years in Industry experience.
  • Bachelor or Master's degree in Electrical or Computer Engineering.
  • Capable of leading complex IP, SOC development projects execution. Experience coordinating with contractors a plus.
  • Top-down planning and execution of SOC projects.
  • Experience in full-chip development cycle.
  • Able to build strong technical teams.
  • Hands-on experience in architecture, micro-architecture, digital design processes.
  • Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI.
  • Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc.
  • Knowledge of processors like RISC-V and ARM processors.
  • Knowledge of design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints and STA Timing Closure.
  • Knowledge of DFT including Scan, ATPG, MBIST.
  • Knowledge of low power design methodology (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling).
  • Knowledge of hardware accelerators.
  • Knowledge of Verilog and System Verilog.
  • Knowledge of scripting languages like Perl, Python, Tcl, shell.
Benefits:
  • Equity Rewards (RSUs).
  • Employee Stock Purchase Plan (ESPP).
  • Insurance plans with Outpatient cover.
  • National Pension Scheme (NPS).
  • Flexible work policy.
  • Childcare support.

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