Principal Designer for IC Physical Implementation

6 days ago

Alwar, Rajasthan, India beBeePhysicaldesignengineer Full time ₹ 1,50,50,000 - ₹ 2,57,10,000

Job Title: Physical Design Engineer

We are seeking an experienced Physical Design Engineer to join our team at Hewlett Packard Enterprise. This role will be responsible for all aspects of Physical Design for Fullchip/Blocks covering Floorplanning, Placement, Budgeting, Clock Tree planning & analysis, Scan re-ordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure, ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, Low Power solution development & implementation.

The ideal candidate will have a strong background in EDA tools such as DC, ICC2, Cadence Innovus, STAR-RC, PT-SI, Verplex, Quartz, Calibre, internal tools & flow, etc. They will work closely with the methodology team to solve the implementation challenges & provide inputs to improve the Physical design flow.

The successful candidate will be experienced in design automation, with a good understanding of Timing constraints, SI prevention, Power reduction. Prior experience with Synopsys/Cadence/Mentor place and route tools is also required. Additionally, proficiency in Unix/TCL/Perl and good communication and presentation skills are necessary.

Key Responsibilities:

  • All aspects of Physical Design for Fullchip/Blocks
  • Floorplanning, Placement, Budgeting, Clock Tree planning & analysis, Scan re-ordering, Clock tree synthesis, Placement optimizations, Routing, Timing and SI analysis/closure
  • ECO tasks (both timing and functional), EM/IR, DRC, LVS, ERC analysis & fixes, Low Power solution development & implementation

Requirements:

  • 4+ years experience in ASIC physical design
  • Experience with block implementation, extraction, timing and or full-chip designs
  • Strong communication skills
  • Strong hands-on TCL/Perl development skills

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