Leading Edge AI Accelerator Designer
5 days ago
AI Accelerator Design Engineer
\This is a challenging role for experienced engineers to contribute to the development of novel high-performance AI accelerators.
\The key responsibilities include designing and implementing high-performance TPUs/MPUs and other related AI blocks using RTL, owning IP/block-level RTL from spec to GDS, including design, synthesis, and timing closure, optimizing design for power, performance, and area (PPA), and interfacing with physical design and DFT (Design for Test) engineers for seamless integration.
\We are seeking highly experienced individuals who have a passion for innovation and are excited about the opportunity to create world-class products in India. To be successful, candidates must have a clear understanding of floating-point arithmetic, vector processing, SIMD, MIMD, VLIW, EPIC concepts, strong grasp of digital design fundamentals, computer architecture, virtual memory, and high-speed data-path design.
\Candidates should also be proficient in Verilog/SystemVerilog and simulation tools, experience with EDA tools (e.g., Synopsys, Cadence) for synthesis, lint, CDC, and timing analysis, and a B.S./M.S./Ph.D. in ECE/CS from a top engineering college with 5-15 years of related experience.
\Our pay comprehensively beats semiconductor product players in the Indian market. We are well-funded and looking for talented engineers to contribute to our success.
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