Advanced Verification Specialist

2 weeks ago

Rajahmundry, Andhra Pradesh, India beBeeVerification Full time ₹ 1,50,00,000 - ₹ 2,00,00,000
Senior Design Verification Engineer

We are seeking a highly skilled and experienced Design Verification Engineer to drive our advanced ASICs and SoCs verification efforts.

Key Responsibilities:
  • Develop comprehensive verification plans using industry-leading methodologies (UVM, Formal Verification)
  • Create high-quality verification environments (testbenches) to achieve exceptional code coverage
  • Utilize advanced verification tools (simulators, formal verification tools) to thoroughly verify RTL functionality
  • Debug and analyze verification failures to identify and resolve design issues
  • Collaborate with RTL design engineers to ensure efficient bug resolution and verification plan adherence
  • Mentor junior DV engineers, fostering a culture of excellence and knowledge sharing within the team
  • Champion best practices for verification code quality and participate in code reviews
  • Stay current with the latest advancements in verification tools and methodologies
Requirements:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus)
  • 7-10 years of solid experience in Design Verification for ASICs or SoCs
  • In-depth knowledge of digital design principles (combinational logic, sequential logic, finite state machines)
  • Proven ability to develop, debug, and optimize complex verification environments
  • Expertise in Verilog or VHDL with a strong understanding of verification methodologies (UVM, Formal)
  • Extensive experience with simulation tools (ModelSim, Cadence Incisive, Synopsys VCS) and scripting languages (Python, Perl)
  • Experience with formal verification tools and techniques is a plus
  • Excellent analytical and problem-solving skills with a meticulous attention to detail
  • Strong communication, collaboration, and leadership skills to effectively contribute and guide the team
Lead Senior Design Verification Engineer Role

This senior position requires a proven track record of successfully leading and executing verification projects.

Responsibilities:
  • Lead and define the overall verification strategy for assigned projects, leveraging advanced methodologies (UVM, Formal Verification)
  • Architect and design robust verification environments (testbenches) to achieve exceptional code coverage and functional verification goals
  • Utilize industry-leading verification tools (simulators, formal verification tools) to conduct thorough verification and analysis
  • Debug and troubleshoot complex verification failures, identifying root causes and collaborating with design engineers for efficient resolution
  • Mentor and guide junior DV engineers, fostering a culture of excellence and knowledge sharing within the team
  • Champion best practices for verification code quality and participate in code reviews
  • Stay at the forefront of the verification landscape by actively researching and adopting emerging tools and methodologies
  • Provide technical leadership and contribute to the overall verification roadmap for the team
Taking Your Career to the Next Level

Pursuing this opportunity will enable you to take your career to new heights by working on cutting-edge projects and developing your expertise in design verification.

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