Silicon Architecture Specialist

1 week ago

Hyderabad Secunderabad Telangana, India beBeeVerificationEngineer Full time ₹ 15,00,000 - ₹ 28,00,000

Key Responsibilities:

  • Participate in pre-silicon verification for full chip, blocks, multi-chip and system-level verification
  • Specify design verification plan at soc level/IP level
  • Specify or review verification plans for complex blocks within the ASIC
  • Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified
  • Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Estimate the time required to write new feature tests and any required changes to the test environment
  • Build directed and random verification tests
  • Debug test failures to determine root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
  • Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements
  • Develop complex verification environment using latest coverage/assertions based verification design methodology, which includes :
  • Self-checking, reusable, automated verification environment : both at full-chip & block level
  • Constrained random generators and reference models

Preferred Experience:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • Minimum 8+ years of experience in ASIC Design Verification
  • Excellent knowledge of ASIC Design Flow and SOC architecture
  • Experience in developing complex testbench/model in verilog, System verilog or SystemC
  • Experience with coverage-based verification methodology
  • Experience in writing testplans and testcases
  • Excellent debug skills in functional simulations are must.
  • Experience in random test generation, coverage analysis, failure debug
  • Strong Verilog, SystemVerilog, PLI interface, C/C++, Perl/Shell scripts programming skills.
  • Good understanding and hands-on experience in UVM concepts and SystemVerilog language
  • Good communication skills and ability/desire to foster a team environment.
  • Experience in PCIE and USB protocols verification
  • Experience in low power concepts/verification (NLP/UPF) and emulation is good-to-have
  • Exposure to leadership or mentorship is an asset

Required Skills and Qualifications:

  • B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering
  • Master's degree in Computer Engineering/Electrical Engineering
  • Extensive experience in ASIC design verification with strong knowledge of SOC architecture
  • Proficient in developing complex testbenches/models in Verilog, SystemVerilog, or SystemC
  • Expertise in coverage-based verification methodologies
  • Strong debugging skills with excellent problem-solving abilities
  • Ability to develop high-quality verification environments and perform thorough analysis

Benefits:

  • Competitive compensation package
  • Opportunity to work on cutting-edge projects
  • Collaborative and dynamic work environment
  • Professional growth and development opportunities

Others:

  • Background check required
  • Must have excellent analytical and problem-solving skills
  • Worked on many projects in this field

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