Distinguished Circuit Designer

2 days ago

Davangere, Karnataka, India beBeePhysical Full time ₹ 1,50,00,000 - ₹ 2,50,00,000
Job Description

We are seeking a highly skilled Senior Physical Design Engineer to lead the physical design of complex ASICs, focusing on low power techniques and timing closure. Key responsibilities include developing optimized floor plans for complex ASICs, implementing advanced low power techniques, optimizing clock tree synthesis and timing analysis/closure, ensuring designs adhere to fabrication rules, and verifying that designs do not contain antenna effects.

  • Key Deliverables:
  • Develop optimized floor plans for complex ASICs, taking into account power consumption, area, and performance requirements.
  • Implement advanced low power techniques such as Voltage Islands, Power Gating, and substrate-bias to minimize power consumption.
  • Optimize clock tree synthesis, timing analysis/closure, and SI aware routing to achieve high performance and low power consumption.
  • Ensure designs adhere to fabrication rules and meet logical vs. schematic requirements.
  • Verify that designs do not contain antenna effects that could impact signal integrity.
Requirements
  • Provide technical guidance and mentoring to Physical Design Engineers.
  • Interface with front-end ASIC teams to resolve issues.
  • Develop and maintain documentation of design plans and results.
  • Prioritize work based on project needs and collaborate with different teams to achieve goals.

The ideal candidate will have a strong background in ASIC physical design, excellent communication skills, and experience working with Cadence or Synopsys or Magma physical design tools. They should also be proficient in scripting languages such as PERL and TCL.

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