Chief Microarchitecture Engineer for High-Performance Systems
3 weeks ago
We are seeking a seasoned Chief Microarchitecture Engineer to lead the design and development of high-bandwidth, low-latency on-chip interconnects and chip-to-chip interconnects at Mulya Technologies.
Company OverviewMulya Technologies is a leading Fortune 100 company based in Bangalore. Our team specializes in designing cutting-edge processor features for high-performance secure systems.
SalaryThe estimated salary for this position is $200,000 - $300,000 per annum, depending on experience.
About the RoleThis is an exceptional opportunity to join our team as a Chief Microarchitecture Engineer. You will be responsible for:
- Designing and architecting different interconnect topologies driven by bandwidth, latency, and RAS requirements
- Developing microarchitectures, designing RTL, and collaborating with Verification, DFT, Physical design, FW, and SW teams to develop features
- Signing off pre-silicon designs that meet functional, area, and timing goals
- Participating in silicon bring-up and validation of hardware
To succeed in this role, you should have:
- 6-15+ years of relevant experience in processor interconnect design delivery leadership (e.g., UPI, AXI, AMBA, NoC)
- Expertise in SMP coherency, understanding of various snoop and data network protocols, and knowledge of latency & bandwidth requirements
- Proficient in HDLs (VHDL/Verilog) and experience in High-speed and Power-efficient logic design
- Ability to quickly understand issues spanning multiple functional domains and provide solutions to problems
A Master's Degree in VLSI or related field is preferred.
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