Design Verification Professional
4 days ago
The role involves comprehensive verification of subsystem components and IP's to ensure high-quality and robust designs.
A key responsibility is to develop and implement verification test plans for new subsystems, build testbenches from scratch, and drive functional verification of RTL designs at Sub System level or SoC Level.
Collaboration with design engineers is essential to understand detailed design specifications, target corner cases, and various configurations of subsystem levels.
Regular tracking of progress and ensuring timely coverage closure is also crucial.
This position requires a strong background in Sub System verification methodology and flows, as well as experience with different verification methodologies at Sub System or SoC Level.
System Verilog programming skills and experience with UVM methodology are necessary, along with excellent problem-solving skills and ability to work collaboratively in a fast-paced environment.
Senior candidates with experience in leading teams will be considered for higher/lead roles.
Key Responsibilities:- Develop and implement comprehensive verification test plans for subsystems components and IP's.
- Build testbenches from scratch for new Sub systems, develop verification flows and test cases using System Verilog and UVM methodology.
- Drive functional verification of RTL designs at Sub System level or SoC Level including simulation, debugging and coverage closure.
- Collaborate with design engineers to understand detailed design specifications and target corner cases and various configurations of subsystem levels.
- Generate and analyze verification metrics to regularly track progress and ensure timely coverage closure.
- Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related fields.
- Proficiency in verification languages and methodologies, such as SystemVerilog, UVM, and other industry-standard tools.
- Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and tool integration.
- Excellent problem-solving skills and attention to detail.
- Strong oral and written communication skills, with an ability to work as a team player in a fast-paced collaborative environment.
- Track record of successfully participating in or leading verification of complex IP blocks, Subsystems or SoC Modules.
- 3-15 years of experience in design verification, with a focus on Subsystem/SoC verification.
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