Advanced Hardware Validator

The System Validation team is responsible for ensuring the quality of the SoC silicon. We are looking for self-motivated engineers to join our team and be part of the bare-metal SoC validation process.

We are seeking a skilled System Validation Engineer to design, develop, debug and deliver system/IP validation frameworks for SoC validation. The successful candidate will have a strong understanding of SoC architecture, new features, and test planning.

• Design, develop, debug system/IP validation frameworks to be used in bare-metal and light-weight-RTOS environments for SoC validation.
• Understand SoC architecture, new features, and prepare test plans.
• Develop/port/enhance system validation content based on system-level use cases, low-power use cases, find HW bugs, and root cause them.
• Interface with Design/Software teams for test plan and debugs.
• Interface with various IP validation teams and cross-functional teams (Design/SW) for test plan creation and debug complex issues.
• Use silicon debug hooks to measure power/performance/coverage and other KPI metrics.

• Bachelor's/Masters degree in Electronics and Communication Engineering/Computer Science or related field.
• 2-5 years of working experience (Candidates with less experience with good academics from premier institutes can also be considered).

• Good knowledge and understanding of Embedded SW architecture and development in C, C++, Assembly.
• C language expertise for low-level programming, assembly language for any processor, C-assembly interworking.
• Good knowledge of ARMv8/ARMv9/x86/PowerPC CPU architecture, Interrupt handling, Cache coherency, IO Coherency.
• Good knowledge of SoC architecture having Multicore/Multiprocessor with SMP/heterogenous cores.
• Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies/locking mechanism, Virtual memory/MMU/paging etc.
• Understanding of memory management, weakly ordered memory model/pipelining of memory systems/memory barriers.
• In-depth understanding of software build toolchains comprising of compilers, Makefiles, linker/scatter files.
• Compiler/Linker: Proficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM, Experience in optimizing code and resolving linker issues to ensure efficient and error-free builds.
• Makefiles: Strong understanding of the makefile syntax and usage. Ability to create, modify, and maintain Makefiles to automate the build process and manage dependencies effectively.
• Experience in using JTAG interfaces and tools for debugging HW.
• Scripting languages such as Python, shell scripting etc.

• Exposure to SoC architecture paradigms interconnects, power management, emulation(pre-Si) environment.
• Exposure to working on emulation/pre-si environment is added advantage.
• Experience working with boot code for ARM processors.
• Software development for silicon enablement, silicon validation.
• Board Bring-up/Bring-up of hardware-software solution on FPGA/emulation platforms and on fresh SOC designs.
• Exposure to build automation: Experience with build automations tools such as Jenkins and experience in creating automated build pipelines to streamline the development process.
• Exposure to Regression testing: Understanding of the regression testing methodologies and tools. Ability to design, implement, and execute comprehensive regression test suites to ensure software quality and stability.
• Source code management: Proficient in source code management tools such as Perforce, Git, SVN. Experience in branching merging and resolving merge conflicts.

Code Reviews: Ability to conduct thorough and constructive code reviews to maintain code quality, ensure best practices, and identify areas of improvements.