Senior Validation Engineer
3 weeks ago
Cadence Design Systems, Inc. is seeking a highly skilled Senior Validation Engineer to join our team in defining and executing system validation plans, test silicon boards, and perform Ethernet tests.
Key responsibilities include:
- Participating in the definition of system validation plans and executing test silicon board bring-up and test Ethernet silicon across channels.
- Developing software scripts and custom firmware for optimizing SerDes IP performance in our lab and at customer sites.
- Generating test reports, application notes, and technical marketing documents.
Requirements:
- MTech/MS/BTech in Electronics/Electrical Engineering/Computer Engineering.
- 3+ years of experience in Ethernet system MAC + PHY integration and post-silicon validation.
- Strong experience in layer-1 and layer-2 stacks of Ethernet.
- Proven experience with debugging and parametric analysis of high-speed digital/analog systems.
- Strong bring-up and debugging expertise.
- Experience with laboratory work and handling complex test equipment setups.
- Experience in Post-Silicon validation and Root cause failure analysis.
- Proficient in using modern high-speed lab equipment.
- Excellent analytical and problem-solving skills.
- Good communication skills.
- Working knowledge of Python/Perl/C scripting languages.
We're doing work that matters. Help us solve what others can't.
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