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4 days ago
We are seeking a skilled DSP Core Verification Engineer to join our team. The ideal candidate will have extensive experience in verifying high-performance digital signal processing cores and subsystems.
Key Responsibilities:- Lead the verification of complex proprietary DSP IP with an emphasis on power-aware verification.
- Design and implement SystemVerilog testbench environments following UVM/OVM methodologies.
- Develop comprehensive verification plans and execute simulation, assertions, formal verification, and HW-SW co-verification.
- Drive power-aware RTL simulation using UPF methodologies.
- Perform detailed debugging and simulation tasks to ensure product quality.
- Automate verification processes with scripting and verification tools to improve efficiency and quality.
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 3+ years of hardware verification experience, OR Master's degree with 2+ years, OR PhD with 1+ year of experience.
- 5-8 years experience in processor/ASIC design verification preferably with ARM or DSP subsystems.
- Strong background in digital design, processor architecture, and power-aware verification.
- Expertise in SystemVerilog testbench architecture and implementation (OVM/UVM).
- Proficient in UPF and power-aware RTL simulations.
- Experience with simulators/tools from Synopsys, Mentor, or Cadence.
- Familiarity with hardware verification languages (SystemVerilog, VERA), and hardware description languages (Verilog, SystemVerilog).
- Knowledge of AMBA protocols (AHB, AXI, APB) and debug protocols.
- Good understanding of Object-Oriented Programming (OOP) concepts.
- Scripting and automation skills: Perl, Python, Shell scripting, Makefile, TCI.
- Excellent interpersonal and communication skills to work effectively across global teams.
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