Verification Expert
2 weeks ago
Our organization is seeking a Verification Professional with expertise in developing advanced verification environments for complex Network-on-Chip (NoC) and Intellectual Property (IP) blocks.
- We require the ability to define and implement comprehensive test plans, coverage models, scoreboards, monitors, and checkers for both coherent and non-coherent traffic scenarios.
- The selected candidate will be responsible for integrating and verifying IPs like AXI4, CHI-B/C/E, PCIe, and UCIe connected via NoC.
- A strong understanding of credit-based flow control, packet routing, Quality of Service (QoS), and virtual channel behavior is essential for this role.
- Experience with assertion-based verification using SystemVerilog Assertions/Digital Verification Library is highly desirable for protocol compliance and corner cases analysis.
- The ideal candidate will be able to debug complex interactions at simulation or emulation level, including deadlocks, congestion, or ordering violations.
- Frequent collaboration with architects and Register-Transfer Level (RTL) teams is required to ensure alignment of verification coverage and performance metrics.
- Closing coverage gaps and achieving complete verification sign-off are key objectives for this position.
Key Skills:
- Strong experience with SystemVerilog, Universal Verification Methodology (UVM), and object-oriented testbench development.
- In-depth knowledge of NoC protocols (AXI4, CHI, TileLink, or proprietary NoC).
- Verification expertise with coherent interconnects, cacheable traffic, and memory subsystem validation.
- Familiarity with Synopsys, Cadence, or Siemens verification tools (VCS/Xcelium/Questa).
- Familiarity with formal verification, assertions (SVA/PSL), and coverage metrics.
- Ability to debug low-level issues using waveform analysis, scoreboards, and transactors.
- Familiarity with multi-core CPU, Digital Signal Processing (DSP), or Graphics Processing Unit (GPU) interconnect systems is beneficial.
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