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High-Performance AI Accelerator System Architect
2 weeks ago
We are seeking a highly experienced designer to contribute to the development of novel high-performance AI accelerators from scratch.
Key Responsibilities:- Design and implement high-performance TPUs/MPUs and other related AI blocks using RTL.
- Own IP/block-level RTL from spec to GDS, including design, synthesis, and timing closure.
- Optimize design for power, performance, and area (PPA).
- Interface with physical design and DFT (Design for Test) engineers for seamless integration.
- Drive design reviews, write design documentation, and support post-silicon bring-up/debug.
To succeed in this role, you should have a passion for innovation and a strong grasp of digital design fundamentals, computer architecture, virtual memory, and high-speed data-path design. Proficiency in Verilog/SystemVerilog and simulation tools is also essential. Experience with EDA tools for synthesis, lint, CDC, and timing analysis is a plus.
Requirements:- B.S./M.S./Ph.D. in ECE/CS from a top engineering college with 5-15 years of related experience.
- Previous experience in either high-performance processor design or AI accelerator design is a plus.
- Clear understanding of floating-point arithmetic, vector processing, SIMD, MIMD, VLIW, EPIC concepts.
If you are excited about creating world-class products, please submit your application.
