
Senior Digital Circuit Designer
1 week ago
Opportunity exists for experienced RTL designers to work on ASIC/IP Design projects in Bangalore.
To excel in this role, candidates should possess:
- A minimum of 7 years of experience in ASIC/IP Design
- Proficiency in Logic design / RTL design
- Familiarity with tools used in ASIC development such as Lint and CDC
- Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture
In this Design Verification Engineer position, responsibilities will include:
- IP verification using SV/UVM
- SOC Verification using C/SV
- Third Party VIP Integration
- Interconnect Protocols: AHB, AXI, APB
- SOC Interfaces: GPIO, SPI, I2C, UART (3+)
- High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI (7+)
- Memory Interfaces: DDR or HBM I/O (10+)
- Coverage Closure: Code, Functional and Toggle
• Tools: Synopsys VCS or Cadence Incsive
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