Verification Manager
3 weeks ago
About Mulya Technologies
We are a technology consulting company delivering best-in-class Chip Design Services. Our team of experts partners with top semiconductor companies to build a connected, safer tomorrow.
Our embedded design services are centered around FW validation & Test Automation. We offer a wide variety of Semiconductor skills including Analog IP Design, Foundation - OpAmp, Bandgap, IOs - GPIO, I2C, LVDS, Clocking - PLL, Power - LDO, SoC Design, RTL Design, Integration, Lint/CDC/RDC, UPF, IP/SoC UVM Verification, PPA, Synthesis, Constraints Management, Physical Design, Timing Closure, ECOs, Sign-off - Timing, Power, EM/IR, DRC/LVS/ERC, PDK, Design Automation, DRC/LVS/Extraction Rule deck Development, and PCell Development.
We support a mix of engagement models to support diverse client requirements. These include Turnkey (SoW) Engagement, Staff Augmentation (T&M), and Offshore Design Center.
We are seeking a hands-on, experienced and dynamic Design Verification Manager
with a deep understanding of digital design principles, interface protocols, memory protocols, and SoC verification methods.
The ideal candidate will lead our verification team to ensure the quality and reliability of our digital designs, utilizing advanced verification methodologies such as SystemVerilog and UVM.
The role involves:
- Team Leadership: Lead, mentor, and manage a team of verification engineers. Foster a collaborative and innovative team environment. Develop team skills through training and professional development initiatives.
- Verification Strategy: Define and implement verification plans for digital designs, including SoCs. Develop and maintain verification environments using SystemVerilog and UVM. Ensure comprehensive verification coverage for all design blocks and system-level integration.
- Project Management: Plan and estimate verification tasks, resources, and schedules. Track and report on verification progress, ensuring timely delivery of verification milestones. Coordinate with cross-functional teams, including design, architecture, and software, to align verification activities with project goals.
- Technical Expertise: Lead the development and execution of test plans, testbenches, and test cases. Perform and oversee gate-level simulations, including timing analysis and power estimation. Apply knowledge of interface protocols (e.g., PCIe, Ethernet), memory protocols (e.g., DDR, HBM), and SoC verification methods to ensure design quality. Identify and resolve complex design and verification issues.
- Continuous Improvement: Stay updated with the latest industry trends, tools, and methodologies in design verification. Drive continuous improvement initiatives to enhance verification efficiency and effectiveness. Implement best practices for verification and contribute to the development of verification standards and processes.
Key Qualifications:
- Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience: 12+ years of experience in digital design verification.
- Technical Skills: Deep understanding of digital design principles and verification methodologies. Proficiency in SystemVerilog and UVM for verification. Experience with gate-level simulation and timing analysis. Strong knowledge of interface protocols (e.g., PCIe, Ethernet) and memory protocols (e.g., DDR, HBM). Familiarity with SoC verification methods and tools.
- Soft Skills: Excellent leadership and team management abilities. Strong problem-solving and analytical skills. Effective communication and interpersonal skills. Ability to work in a fast-paced, dynamic environment and manage multiple projects simultaneously.
Estimated Salary: $150,000 - $200,000 per year.
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